PCB的常用规则创建

为了布线方便,需要修改Altium Design的规则

设计->规则(R)->

Design Rules->Electrical->Clearance->Clearance->Minimuim Clearance = 5mil

在Clearance下新建规则:右键->New Rule Name=Poly  在Where The First Object Matches 勾选为Advanced(Query) 并在右框Full Query修改为  (INPolygon)  Minimuim Clearance = 10mil 此为创建关于覆铜的规则。

在Clearance下新建规则:右键->New Rule Name=Via-Poly 在Where The First Object Matches 勾选为Advanced(Query) 并在右框Full Query修改为 (IsVia)  在Full Query 修改为 INPOLY此为创建关于过孔到覆铜的规则。

Design Rules->Routing->Width->Width 全部修改为6mil

在Width下新建规则:右键->New Rule Name = Pwr 在Where The First Object Matches 窗口中选择电源和地的网络,(可以在Class中创建一个名为PWR的Nets,将电源和地添入Class)勾选Net Class,在Constrains中 将Min Preferred 和 Max Width分别修改为 10、12和60mil。

Design Rules->Routing->Routing Via Style->RoutingVias 中Constrains修改Via Diameter全部修改为16mil Via Hole Size 全部修改为8mil。

Design Rules->Routing->Mask->Solder Mask Expansion->SolderMaskExpansion 中Constrains修改Expansion = 2.5mil

Design Rules->Routing->Plane->Power Plane Connect Style ->PlaneConnect 中Constrains修改 Conductor Width = 10mil,AirGap = 8mil,Expansion = 6mil。

Design Rules->Routing->Plane->Power Plane Clearance->PlaneClearance 中Constrains修改 Clearance = 8 mil

Design Rules->Routing->Plane->Power Connect Style -> PolygonConnect 中Constrains修改 Conductor Width = 15mil

在Power Connect Style下新建规则:右键->New Rule Name = PolygonConnect_via 在Where The First Object Matches 勾选为Advanced(Query) 并在右框Full Query修改为  (isvia) 斌=并在Constraints中 Connect Style 选择 Direct Connect。次规则是为了将过孔和地的连接改为全部覆铜,增加平面完整性。

PCB的常用规则创建

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